Toshiba & Elixent Agree to Jointly Develop Reconfigurable Platform SoCs; First Platform Device to Be Available in 2003

BRISTOL, England--(BUSINESS WIRE)--Jan. 27, 2003--Elixent has entered into an agreement with Toshiba to jointly develop a platform System-on-Chip (SoC) that integrates Elixent's D-Fabrix reconfigurable algorithm processing array with Toshiba's MeP configurable processor core (http://www.mepcore.com). This SoC will be used as a reconfigurable evaluation and development platform by both companies.

The D-Fabrix array will be used to accelerate algorithm processing and provide dynamic reconfigurability within the platform. The resulting platform SoC will be useful for the implementation of a broad range of consumer applications, combining the benefits of Toshiba's MeP processor and Elixent's reconfigurable technology.

With rapidly rising mask set costs being incurred due to the move to 90nm and 65nm, a different technique is essential for cost-effective production. Elixent's reconfigurable technology will help semiconductor companies maintain their lead on the cutting edge processes needed to manufacture SoCs at these new geometries.

"We evaluated many solutions before choosing Elixent," said Dr Furuyama, General Manager of Toshiba's SoC Research and Development Center. "D-Fabrix is the reconfigurable algorithm processor that will well fit with Toshiba's MeP platform and thus will efficiently provide various benefits."

The combination of dynamic reconfiguration and changing the algorithm processing architecture on-the-fly under the control of Toshiba's MeP processor delivers substantial savings in cost and power. It produces a completely programmable device with performance exceeding that of the fastest DSPs.

"We are convinced that this technology will trigger substantial change in the industry", commented Kenn Lamb, Elixent's CEO. "From the earliest development of D-Fabrix, starting over six years ago at HP Labs, it was apparent that the potential cost, speed and power consumption benefits would make it a winning solution," he continued. "This announcement shows how right we were and we are very excited about this agreement with Toshiba."

About Elixent's reconfigurable algorithm processing architecture

Elixent's D-Fabrix RAP platform implements algorithms in "Virtual Hardware", allowing the creation of a hardware accelerator for every algorithm in a system. By virtue of reconfigurability, it can implement multiple hardware accelerators in the same silicon area, giving high silicon utilisation. Further, this reconfigurability allows functionality to be added or changed post-fabrication, allowing bugs to be fixed, new functions to be added, or even the whole chip to be customised.

It achieves this by mapping algorithms to a fine-grained processing array made up of ALUs, registers and memories, giving it a unique ability to adapt to any algorithm or datapath width. This provides the flexibility of a software solution with the performance of a hardwired ASIC.

Through dynamic reconfiguration Elixent's D-Fabrix array allows for a high degree of silicon reuse, leading to lower device cost. In benchmarks against standard DSP processors, D-Fabrix provides 10x the performance in less silicon area - and with greatly reduced power consumption. Additionally, D-Fabrix enables a new class of platform devices that can be truly multi-functional - supporting multiple applications, and adapting efficiently to changing specifications.

About Elixent

Elixent is a leader in reconfigurable semiconductor IP. D-Fabrix, the company's patented reconfigurable algorithm processing (RAP) technology provides solutions for companies producing electronic products for imaging and communications applications in consumer and industrial markets. Visit www.elixent.com for more information.

For more information please contact:

Ralph Weir, Elixent, Castlemead, Lower Castle Street, Bristol, BS1 3AG, UK

Tel: +44 (0)117 917 5762, email: ralph.weir@elixent.com

For press enquiries please contact:

Matt Wilson, EML, The Albany Boathouse, Lower Ham Road, Kingston upon Thames, Surrey, KT2 5BB, UK

Tel: +44 (0)20 8408 8000, email: mattw@eml.com

Editorial Backgrounder

Why Reconfigurable Is the Hottest Topic in Semiconductors

Early 2003 (a) will see the first commercial chips produced on 90nm processes, representing a 4x density increase from the last-generation 0.18u process - and double the current leading-edge process of 0.13u. At 90nm, the cost of a mask set is approximately SIX TIMES higher than at 0.18u. (b)

At the same time, cutting-edge fabs are moving to a 300mm wafer - giving approximately double the number of devices per wafer as the last generation 200mm fabs.

This combination has been portrayed as a killer blow for the semiconductor industry. A 6x increase in mask charges raises the point at which it is viable to produce an ASIC or SoC; and when combined with the vastly increased number of devices yielded per wafer lot, it's easy to see why ASIC starts have been falling drastically.

However there is a solution - the reconfigurable "platform SoC". This contains a blend of programmable components, such as a RISC and a Reconfigurable Algorithm Processor, possibly with some interfaces specific to one market. Such an SoC can be reconfigured to serve multiple markets. This has two main benefits:

--	The mask charge is now shared between multiple projects. Aggregating the volume of multiple projects in this way allows SoCs to be financially justified.
--	The SoC is now entirely programmable. Very little is specified in hardware; thus, it is very likely that should a bug be found, or a specification be varied, a solution can be found that does not necessitate a new chip - and a new mask charge.

Reconfigurable Algorithm Processing has many further benefits that reduce unit cost - such as the concept of Dynamic Reconfigurability. Used this way, a single small piece of silicon performs many functions that would otherwise require multiple hardware engines - resulting in a smaller die.

While these latter reasons make reconfigurable technology attractive, the compelling reason is the exponentially increasing mask charges that SoC developers face. Without reconfigurable technology, there may be no SoC business at the 65nm node. This motivation is what is driving the world's top semiconductor companies to identify reconfigurable solutions - as a matter of urgency.

(a) Based on releases from Xilinx, IBM & TSMC amongst others...

(b) All numerical data from Jeremey Donovan - Vice President and Chief Analyst at Gartner Dataquest. Online analysis at http://www.eet.com/comm/c/mw/OEG20021118S0021

CONTACT: Elixent, Bristol
             Ralph Weir
             Tel: +44 (0)117 917 5762      
             email: ralph.weir@elixent.com 
             or
             For press enquiries
             EML
             Matt Wilson                        
             Tel: +44 (0)20 8408 8000
             email: mattw@eml.com